The sigma delta technique that is utilized is the output from the PID which comes out at 12-bits, and then goes out to a four bit sigma delta and then into a three bit, into the core DPWM, there is a thee bit counter, and a five bit DLL. What is being done with the three bits it is dividing the duty cycle up into basically eight pieces, and then it is going to take a look at the last piece and that is where the last five bits gets applied in controlling where the trailing edge occurs.