Slide 1
Slide 2
Slide 3
Slide 4
Slide 5
Slide 6
Slide 7
Slide 8
Slide 9
Slide 10
Slide 11
Slide 12
Slide 13
Slide 14
Slide 15
Slide 16
Slide 17
Slide 18
Slide 19
Slide 20
Slide 21
Slide 22
Slide 23
Slide 24
Slide 25
Slide 26
Slide 27
Slide 28
Slide 29
Slide 30
Slide 31
Slide 32
Slide 33
Slide 34
Slide 35
Slide 36
Slide 37
Slide 38
Slide 39
Slide 40
Slide 41
Slide 42
Slide 43
Slide 44
Slide 45
Slide 46
Slide 47
Slide 48
Slide 49
Product List
The error caused by bias current can be reduced by choosing an amplifier with very low input bias current. CMOS and JFET input stages have the lowest bias current. However, the bias current of JFET input op amps is more susceptible to temperature variation. In some JFET op amps the bias current will double for every 10°C rise in temperature. So bias current over the full temperature range should be taken into consideration.
PTM Published on: 2009-01-26
