Slide 1
Slide 2
Slide 3
Slide 4
Slide 5
Slide 6
Slide 7
Slide 8
Slide 9
Slide 10
Slide 11
Slide 12
Slide 13
Slide 14
Slide 15
Slide 16
Slide 17
Slide 18
Slide 19
Slide 20
Product List
The general purpose DMA embeds four channels, three channels with 8 bytes of FIFO for channel buffering and one channel with 32 bytes of FIFO. It supports a wide range of transfer types, including memory-to-memory or peripheral-to-memory transfers for the SPI, SSC and MCI. A new feature of DMA implementation on the SAM3U is that the it can be triggered by the PWM controller or any Timer Counter channel to generate a waveform through the External Bus Interface.
PTM Published on: 2012-01-18